1. Field of the Invention
The present invention relates to a system for controlling the power dissipated by a power stage working in a mixed Linear/PWM (“Pulse Width Modulation”) mode, for driving an electromagnetic load.
More specifically, the invention relates to a system of the above type comprising a power amplifier incorporating a bridge-like circuit, with a half-bridge controlled in PWM mode and another half bridge controlled in linear mode, respectively by a converter block and by an error amplifier, the electromagnetic load being crossed by a current and generating an electromotive force, the control system further comprising a first amplifier of a voltage drop calculated on a sensing resistance of the electromagnetic load, and a second amplifier for the amplification of the output signal of the above first amplifier.
More particularly, the invention relates to a system for controlling the power dissipated by a power stage working in mixed Linear/PWM mode, for driving an electromagnetic load, in a bridge-like transconductance amplifier. The following description is made with reference to this field of application for convenience of illustration only.
2. Description of the Related Art
Systems for driving an electromagnetic load by means of a power stage are known wherein the driving is realised in different modes: linear, Pulse Width Modulation (PWM), mixed linear/PWM; in consideration thereof, a power stage can be of the linear type, also called class AB, in Pulse Width Modulation (PWM), also called class D or mixed linear/PWM, also called class H-DAB.
A known solution for realising a driving system in mixed linear/PWM mode is contained in European patent EP1339163 assigned to the assignee hereof.
This solution is hereafter described with reference to FIGS. 1 and 2.
FIG. 1 shows a power amplifier 1 comprising a bridge-like circuit 2 which drives an electromagnetic load, for example a Voice Coil Motor (“VCM”) in a mixed Linear/PWM mode. The bridge-like circuit 2 receives at its input a first control signal, in particular a linear IN_LIN signal, a second PWM control signal, in particular an IN_PWM signal, and two voltages, a first supply voltage Vm and a second supply voltage, in particular a ground (“GND”) voltage.
The bridge-like circuit 2 comprises two pairs of parallel transistors; in the prior art example of FIG. 1, the transistors are of the MOS type.
The first pair of transistors is placed in the half bridge driven in PWM mode of the bridge 2, indicated with 2a, and it comprises a first transistor TR1 and a second transistor TR2 which receive, at the respective control terminals (gates) G1 and G2 the IN_PWM signal, directly on G1 and in inverted form on G2, by means of an inerter N1. A first conduction terminal of the first transistor TR1, in particular the drain terminal coincides with the supply terminal Vm of the bridge-like circuit 2, whereas a second conduction terminal, in particular the source terminal coincides with a first conduction terminal of the second transistor TR2, in particular the drain terminal. The common terminal is indicated with OutM. A second conduction terminal, in particular the source terminal of the second transistor TR2 coincides with the ground terminal GND.
The second pair is placed in the half bridge driven in linear mode of the bridge 2, indicated with 2b, and it comprises a third transistor TR3 and a fourth transistor TR4 which receive at the respective control terminals (gates) G3 and G4 the signal IN_LIN, amplified by a linear amplifier AB1 in class AB. A first conduction terminal of the third transistor TR3, in particular the drain terminal coincides with the supply terminal Vm of the bridge-like circuit 2, whereas a second conduction terminal, in particular the source terminal coincides with a first conduction terminal of the fourth transistor TR4, in particular the drain terminal. The common terminal is indicated with OutP. A second conduction terminal, in particular the source terminal of the fourth transistor TR4 coincides with the ground terminal GND.
The outputs of the bridge-like circuit 2 are identified by nodes OutP and OutM. The signals generated by such bridge-like circuit 2 drive the above motor VCM, which is crossed by a current IVCM in the range of time wherein it is enabled. In other words, the voltage difference between the two output signals of the bridge-like circuit 2, calculated in the points OutM and OutP, is the voltage applied to the motor VCM.
A current sensor, for example a sensing resistance Rs is inserted in series to the motor VCM.
In the absence of current in the motor VCM, two voltage values are generated at the ends M and P of the sensing resistance Rs identified by means of the signals Out1 and Out2; the two signals merge in a sense amplifier block 3, respectively at the inverting and non-inverting terminals of negatively fedback operational amplifier 4; the input signal Out2 is compared with a reference voltage value Vref, also at the input of the non-inverting terminal; an amplified Vout signal is generated at the output of the sense amplifier block 3 for providing an input value at the error amplifier block 5.
Error amplifier block 5 comprises negatively fedback operational amplifier 6 negatively fedback which receives at its non-inverting terminal (+) a reference voltage value Vref and at its inverting terminal (−) the Vout value compared with a reference voltage value Vin, at the input of the same block 5; the compared signal is amplified by amplifier e and filtered by the error amplifier 5.
The resulting error signal IN_LIN at the output of the above block 5 and at the input of the bridge-like circuit 2 contains the information for the closure of the current control loop IVCM of the VCM motor.
The current control loop IVCM of the VCM motor comprises both the PWM half-bridge 2a and the linear one 2b of the circuit, being both part of the bridge-like circuit 2.
The signal IN_LIN is applied at the input of a converter block PWM CONV which produces the corresponding signal IN_PWM in pulse width modulation for driving the PWM half-bridge 2a of bridge 2 of power amplifier 1.
The linear signal IN_LIN, moreover, suitably amplified by a linear AB1 amplifier in class AB, drives, without any conversion, the linear half bridge 2b of the above bridge 2 of power amplifier 1.
With respect to a completely linear operation which would occur by using two half-bridges with linear power stages of class AB, the dissipated power is lower.
Unfortunately, although advantageous under several aspects, this solution has a serious drawback. In fact, the dissipated power is lower than that dissipated by a system completely driven in linear mode, but it is however much higher than that dissipated by a system completely driven in PWM (100% PWM).
A quantification of this drawback is reported in the diagram of FIG. 2; this figure shows the trends of the dissipated power in accordance with the current IVCM in the VCM motor in the various configurations of the power stage: class AB (linear), class H-DAB (50% linear and 50% PWM or mixed Linear/PWM) and class D (100% PWM).
As already hinted at, the power dissipation of power amplifier 1 driven in mixed Linear/PWM mode, is significantly higher than the dissipation calculated by using a power amplifier 1 driven in 100% PWM mode.
What is desired is a system for controlling the power dissipated by a power stage, having such structural and functional characteristics to allow a reduction of the power dissipated for driving an electromagnetic load in mixed linear/PWM mode, overcoming the limits and/or the drawbacks of the prior art.